/* linux/include/asm-arm/arch-at91sam9260/at91sam9260_ecc.h
 * 
 * Hardware definition for the ecc peripheral in the ATMEL at91sam9260 processor
 * 
 * Generated  12/07/2006 (15:04:00) AT91 SW Application Group from HECC_6143A V1.1
 * 
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License as published by the
 * Free Software Foundation; either version 2 of the License, or (at your
 * option) any later version.
 * 
 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
 * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
 * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 * 
 * You should have received a copy of the  GNU General Public License along
 * with this program; if not, write  to the Free Software Foundation, Inc.,
 * 675 Mass Ave, Cambridge, MA 02139, USA.
 */


#ifndef __AT91SAM9260_ECC_H
#define __AT91SAM9260_ECC_H

/* -------------------------------------------------------- */
/* ECC ID definitions for  AT91SAM9260           */
/* -------------------------------------------------------- */

/* -------------------------------------------------------- */
/* ECC Base Address definitions for  AT91SAM9260   */
/* -------------------------------------------------------- */
#define AT91C_BASE_HECC      	0xFFFFE800 /**< HECC base address */
#define AT91C_BASE_HECC      	0xFFFFE800 /**< HECC base address */

/* -------------------------------------------------------- */
/* PIO definition for ECC hardware peripheral */
/* -------------------------------------------------------- */

/* -------------------------------------------------------- */
/* Register offset definition for ECC hardware peripheral */
/* -------------------------------------------------------- */
#define ECC_CR 	(0x0000) 	/**<  ECC reset register */
#define ECC_MR 	(0x0004) 	/**<  ECC Page size register */
#define ECC_SR 	(0x0008) 	/**<  ECC Status register */
#define ECC_PR 	(0x000C) 	/**<  ECC Parity register */
#define ECC_NPR 	(0x0010) 	/**<  ECC Parity N register */
#define ECC_VR 	(0x00FC) 	/**<  ECC Version register */

/* -------------------------------------------------------- */
/* Bitfields definition for ECC hardware peripheral */
/* -------------------------------------------------------- */
/* --- Register ECC_CR */
#define AT91C_ECC_RST         (0x1 << 0 ) /**< (ECC) ECC reset parity */
/* --- Register ECC_MR */
#define AT91C_ECC_PAGE_SIZE   (0x3 << 0 ) /**< (ECC) Nand Flash page size */
/* --- Register ECC_SR */
#define AT91C_ECC_RECERR      (0x1 << 0 ) /**< (ECC) ECC error */
#define AT91C_ECC_ECCERR      (0x1 << 1 ) /**< (ECC) ECC single error */
#define AT91C_ECC_MULERR      (0x1 << 2 ) /**< (ECC) ECC_MULERR */
/* --- Register ECC_PR */
#define AT91C_ECC_BITADDR     (0xF << 0 ) /**< (ECC) Bit address error */
#define AT91C_ECC_WORDADDR    (0xFFF << 4 ) /**< (ECC) address of the failing bit */
/* --- Register ECC_NPR */
#define AT91C_ECC_NPARITY     (0xFFFF << 0 ) /**< (ECC) ECC parity N  */
/* --- Register ECC_VR */
#define AT91C_ECC_VR          (0xF << 0 ) /**< (ECC) ECC version register */

#endif /* __AT91SAM9260_ECC_H */
